PCI-SIG Compliant Four Lane PCI Express to Local Bus Bridge

The GN4124 is a PCI-SIG compliant four lane PCI Express to local bus bridge that is designed to work as a companion for low-cost FPGA devices to provide a complete bridging solution for general applications.

In addition to a 4-lane PCI Express compliant PHY interface, the GN4124 also contains the data link and transaction layers, and an applications interface that is ideally suited to FPGA interfacing using a small number of pins.

Since the PCI Express transaction/link IP is hard-wired into the GN4124, there is no need to license PCIe IP. The level of integration and very low power operation of the GN4124 make it an ideal alternative to using a PIPE PHY, where IP licensing and the cost of FPGA resources and power consumption is unattractive by comparison. Using the GN4124 allows FPGA resources to be spent on what differentiates the product rather than on implementing the PCI Express protocol.

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